Ministry of Education
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Yamini Devi Ykuntam

vidwan id: 228974
Female

Assistant Professor, Department of Electronics and Communication Engineering
Aditya University

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 11
Books 0
Proceedings 0

Publications

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Scopus

Citations 18
h-index 1

CrossRef

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Citations 8
h-index 2
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IETE

2022
LIFE TIME MEMBER

Bio

Electronics and communication Engineering

Personal Details

  • Female
  • Assistant Professor , Aditya University
  • Aditya Engineering College, Aditya Nagar, ADB Road, Surampalem
M.Tech
Other Institute 2013
Assistant Professor Aug 2019 – Present
Aditya University | Department of Electronics and Communication Engineering

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Co-Authors (5)

Krishna

Mr Krishna Saladi

Dhanekula Institute of Engineering & Technology, Ganguru

P

Mr P BUJJIBABU

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SATTI

Mr SATTI HARICHANDRA PRASAD

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M

Dr M Rajan Babu

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KATTA

KATTA PAVANI

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Scholarly Work

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Scholarly Publications

Design of speed and Area efficient Non linear carry select Adder

Open Access
conference paper
Year: 2023.
Authors: Ykuntam Yamini

An efficient Pulse Doppler Radar block level modeling with Xilinx System Generator

Open Access
conference paper
Year: 2022. Pages: 1-6 .
Authors: Bujjibabu Penumutchi
DOI 10.1109/AISP53593.2022.9760687

A modified high speed and less area BCD adder architecture using Mirror adder

Open Access
conference paper
Year: 2021.
Authors: YAMINI DEVI YKUNTAM, Satti Harichandra Prasad
DOI 10.1109/ICOSEC51865.2021.9591842

A modified high speed and less area BCD adder architecture using Mirror adder

Open Access
CONFERENCE
Year: 2021. Pages: 624-627 .
Authors: Ykuntam, Y.D. and Prasad, S.H.
DOI 10.1109/ICOSEC51865.2021.9591842

Comparative Analysis of Rapid Single Flux Quantum (RSFQ) Circuit Technique Multipliers

Open Access
ARTICLE
Year: 2021. Volume: 702 , Pages: 127-133 .
Authors: Ykuntam, Y.D. and Pavani, K.
DOI 10.1007/978-981-15-8439-8_11

Design and analysis of High speed wallace tree multiplier using parallel prefix adders for VLSI circuit designs

Open Access
conference proceedings
Year: 2020.
Authors: YAMINI DEVI YKUNTAM, PAVANI KATTA, S.KRISHNA
DOI 10.1109/ICCCNT49239.2020.9225404
5

Design and analysis of High speed wallace tree multiplier using parallel prefix adders for VLSI circuit designs

Open Access
Conference Paper
Year: 2020.
Authors: Yamini devi Ykuntam ., Katta Pavani ., Krishna Saladi .,
DOI 10.1109/ICCCNT49239.2020.9225404
18

A Novel Architecture of High-Speed and Area-Efficient Wallace Tree Multiplier Using Square Root Carry Select Adder with Mirror Adder

Open Access
book
Year: 2019.
Authors:
DOI 10.1007/978-981-13-3765-9_33
3