Ministry of Education
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Dr Dheeraj Kumar Sinha

vidwan id: 215070
Male

Assistant Professor, Department of Electronics and Communication Engineering
Indian Institute of Information Technology, Bhagalpur

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 12
Books 0
Proceedings 0

Publications

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Scopus

Citations 40
h-index 3

CrossRef

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Citations 13
h-index 1
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Bio

Semiconductor Device Modeling, ESD Protection Device Design, Layout Optimization, Device to Circuit Interaction

Personal Details

  • Male
  • Assistant Professor , Indian Institute of Information Technology, Bhagalpur
  • Indian Institute of Information Technology Bhagalpur, Bhagalpur College of Engineering Campus, Sabour
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Assistant Professor Jul 2017 – Present
Indian Institute of Information Technology, Bhagalpur | Department of Electronics and Communication Engineering

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Co-Authors (7)

Ashok

Dr Ashok Kumar Ray

North Eastern Regional Institute of science and technology (NERIST)

Pankaj Kumar

Dr Pankaj Kumar Tiwari

Indian Institute of Information Technology, Bhagalpur

Pratima

Prof Pratima Agarwal

Indian Institute of Technology Guwahati

Srimanta

Prof Srimanta Baishya

National Institute of Technology Silchar

Sourav

Dr Sourav Roy

Vignan's Institute of Information Technology, Beside VSEZ, Duvvada, Gajuwaka,Vadlapudi (P.O)Pin-530049 (CC-L3)

Sushanta

Dr Sushanta Bordoloi

National Institute of Technology Mizoram

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Dr Gaurav Trivedi

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Scholarly Work

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Scholarly Publications

A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET

Open Access
Conference Paper
Year: 2016. Volume: 2016-March , Pages: 312-317 .
Authors: Sinha D.;Chatterjee A.;Abhinav V.;Trivedi G.;Koldyaev V.
DOI 10.1109/VLSID.2016.46

A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach

Open Access
Conference Paper
Year: 2016. Volume: 2016-March , Pages: 282-287 .
Authors: Abhinav V.;Sinha D.K.;Chatterjee A.;Brewer F.
DOI 10.1109/VLSID.2016.50
3

Modeling Erratic Behavior Due to High Current Filamentation in Bipolar Structures under Dynamic Avalanche Conditions

Open Access
Article
IEEE Transactions on Electron Devices. Year: 2016. Volume: 63 , Issue: 8 , Pages: 3185-3192 .
Authors: Sinha D.K.;Chatterjee A.;Schrimpf R.D.
DOI 10.1109/TED.2016.2584102
8

Methodology for optimizing ESD protection for high speed LVDS based I/Os

Open Access
Conference Paper
Year: 2015.
Authors: Abhinav V.;Chatterjee A.;Sinha D.;Singh R.
DOI 10.1109/ISVDAT.2015.7208096
4