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Dr Prabhu Prasad B M

vidwan id: 207129
Male

Assistant Professor, Department of Computer Science and Engineering
Indian Institute of Information Technology, Dharwad

Expertise

  • Computer Science Hardware and Architecture

Publications

Total Articles 18
Books 0
Proceedings 0

Publications

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Scopus

Citations 55
h-index 4

CrossRef

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Citations 42
h-index 4
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Professional Recognition

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Bio

Computer architecture, Network-on-Chips, High-performance computing

Personal Details

  • Male
  • Assistant Professor , Indian Institute of Information Technology, Dharwad
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Assistant Professor Apr 2021 – Present
Indian Institute of Information Technology, Dharwad | Department of Computer Science and Engineering

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Co-Authors (3)

Manjunath

Dr Manjunath K V

Indian Institute of Information Technology, Dharwad

Sanjay

Dr Sanjay Bankapur

National Institute of Technology, Puducherry

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Dr Shashank Shetty

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Scholarly Work

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Scholarly Publications

P-NoC: Performance Evaluation and Design Space Exploration of NoCs for Chip Multiprocessor Architecture Using FPGA

Open Access
Article

An Efficient FPGA-Based Network-on-Chip Simulation Framework Utilizing the Hard Blocks

Open Access
Article

LBNoc: Design of low-latency router architecture with lookahead bypass for network-on-chip using FPGA

Open Access
Article

YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Supporting Congestion-Aware Adaptive Routing Using FPGAS

Open Access
Article
Authors: Parane K.;Prabhu Prasad B.;Talawar B.

High-performance NoC simulation acceleration framework employing the xilinx DSP48E1 blocks

Open Access
Conference Paper
Authors: Prabhu Prasad B.M.;Parane K.;Talawar B.

Design of an adaptive and reliable network on chip router architecture using FPGA

Open Access
Conference Paper
Authors: Parane K.;Prabhu Prasad B.M.;Talawar B.

Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA

Open Access
Conference Paper
Authors: Sangeetha G.S.;Radhakrishnan V.;Prasad P.;Parane K.;Talawar B.

YaNoC: Yet another network-on-chip simulation acceleration engine using FPGAS

Open Access
Conference Paper
Authors: Parane K.;Talawar B.;Prabhu Prasad B.