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Dr Sudhakar Jyothula

vidwan id: 178165
Male

Principal, Department of Electronics and Communications Engineering
Vignan's Institute of Information Technology, Beside VSEZ, Duvvada, Gajuwaka,Vadlapudi (P.O)Pin-530049 (CC-L3)

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 46
Books 0
Proceedings 0

Publications

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Scopus

Citations 38
h-index 4

CrossRef

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Citations 35
h-index 3
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Professional Recognition

2017

Early Career Research Award

Department of Science & Technology
2018

SASTRA

Vignan group of Institutions
2018

Session Chair

ISMS, Kuala Lumpur

Community & Membership

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IETE

2015
Life Member

The Institution of Engineers(I)

2008
Associate

Bio

VLSI System Design

Personal Details

  • Male
  • Principal , Vignan's Institute of Information Technology, Beside VSEZ, Duvvada, Gajuwaka,Vadlapudi (P.O)Pin-530049 (CC-L3)
  • Department of Electronics and Communication Engineering, Vignans Institute of Engineering for Women
Ph.D
Other Institute 2016
M.Tech
Other Institute 2008
Principal Apr 2023 – Present
Vignan's Institute of Information Technology, Beside VSEZ, Duvvada, Gajuwaka,Vadlapudi (P.O)Pin-530049 (CC-L3) | Department of Electronics and Communications Engineering
Professor Jul 2012 – Apr 2023
Vignan's Institute of Engineering for Women, Kapujaggarupeta, Vadlapudi Post, Gajuwaka, PIN-530049(CC-NM) | Department of Electronics and Communication Engineering

Related Profiles

Experts (19623+)

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Pragati

Ms Pragati Mishra

Assistant Professor

Sridhar

Dr Sridhar Sekar

Assistant Professor

Md

Dr Md Nadeem M

Assistant Professor

Rashmi

Rashmi Chandra

Assistant Professor

Abhishek

Mr Abhishek Shukla

Assistant Professor (Grade-I)

N

Dr N PRAKASH

Assistant Professor

Mrinmoy

Mr Mrinmoy Sadhukhan

Research Scholar

Haranath

Mr Haranath Rakshit

Junior Research Fellow

Organisations (232+)

View All
surya kumari

surya kumari bandaru

Assistant Professor

Somi

Mr Somi Naidu B

Assistant Professor

Borigarla

Mr Borigarla Barhmaiah

Assistant Professor

Brajesh

Dr Brajesh Kumar

Associate Professor

BABURAO

Mr BABURAO MUVVALA

Assistant Professor (Grade-I)

ayanab

Ms ayanab runbin

System Programmer

ARUNAKUMARI

ARUNAKUMARI MAVURI

Assistant Professor

Arun Kumar

Dr Arun Kumar Saurabh

Assistant Professor (Grade-II)

Auadhati

Auadhati Datta

Assistant Professor

Sirisha

Sirisha Aswadhati

Assistant Professor

Co-Authors (6)

Chandra Sekhar

Dr Chandra Sekhar Beera

Vignan's Institute of Engineering for Women, Kapujaggarupeta, Vadlapudi Post, Gajuwaka, PIN-530049(CC-NM)

Dhanalakshmi

Dr Dhanalakshmi Botta

Vignan's Institute of Information Technology, Beside VSEZ, Duvvada, Gajuwaka,Vadlapudi (P.O)Pin-530049 (CC-L3)

Puthilibai

Dr Puthilibai G

Sri Sairam Engineering College, Chennai

Scholarly Work

An Investigation on the Performance of IEEE 754 Double Precision Co-Processor using Asynchronous Circuit Design Methodology

Funding Agency: SERB

Principal Investigator

27,18,100

2017 - 2020

Completed
No Data Found

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EFFICIENT ENERGY FLOATING POINT MULTIPLIER UNIT USING MULTI THRESHOLD DUAL SPACER DELAY INSENSITIVE APPROACH

Dr. J. Sudhakar
Engineering and Technology Application No. : 202041046908 Filed : 28-10-2020
Published : 28-10-2020 Filed

Scholarly Publications

Evaluation of Dual Rail CDI using Asynchronous DI Frameworks

Open Access
conference proceedings
Authors: J. Sudhakar, A.L. Durga and K. Sushma

Evaluation of Dual Rail Complete Detection using Asynchronous Delay Insensitive Frameworks

Open Access
article
Authors: J. Sudhakar, A.L. Durga and K. Sushma

Low power aware pulse triggered flip flops using modified clock gating approaches

Open Access
Article

Design of viterbi decoder for underwater marine receivers using multi-threshold null convention logic (MTNCL)

Open Access
Article
Authors: Jyothula S.;Maheswari A.U.
1

Energy efficient IEEE 754 floating pointmultiplier using dual spacer delay insensitive logic

Open Access
Article

A novel ripple borrow subtractor cell design using asynchronous methodology

Open Access
Conference Paper
Authors: J. Sudhakar ., Ch. Padmavani .,

A Novel Ripple Borrow Subtractor Cell Design using Asynchronous Methodology

Open Access
conference proceedings
Authors: J. Sudhakar, and Ch. Padmavani

Energy Efficient IEEE 754 Floating Point Multiplier using Dual Spacer Delay Insensitive Logic

Open Access
article
Authors: 6. J. Sudhakar, and K. Sushma