Expertise
- Electrical and Electronic Engineering
Publications
Publications
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Scopus
h-index
29
CrossRef
Citations
2590
h-index
26
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Professional Recognition
Received outstanding EDS Volunteer recognition from EDS Chapters in the South Asia region in 2012.
EDS South AsiaReceived Meritorious Teacher by the Govt. of NCT of Delhi
IndiaCertificate of Best Paper of the Technical Session in International Conference 12th IEEE INDICON 2015
IEEE INDICON 2015Certificate of Best Poster
University of DelhiCertificate of Appreciation
University of DelhiDistinguished Lecturer by IEEE Electron Device Society (EDS)
IEEE EDS USAFellow IETE
IndiaExemplary Contribution Award
College Governing BodyCommunity & Membership
Task Force constituted by University of Delhi for FYUP
MemberEmpowered Committee
MemberMember-Choice Based Credit System Committee
University of DelhiSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelSelection Committee - Engineering Sciences for selection of students and faculty members a
Science Education PanelIEEE Electron Device Society - Delhi Chapter
Secretary-IEEE Delhi Section
Member - IEEE Electron Device Society USA Board of Governers
Chapter Advisor - The National Academy of Sciences, India (Allahabad)
MInstP - Member
Associate
M. N. A. Sc
Senior Member
MIET - Member
Bio
Manoj Saxena has authored or coauthored 300 technical papers in international journals and conference proceedings (including 81 papers in IEEE Journals and IEEE conference proceedings) and 30 EDS DL talks in past three years. His current research interest is Nanoelectronic Device Modeling and Simulation i.e. potential and charge based mathematical model for Sub-100 nm Non-Classical MOSFET, Junctionless Transistor, Tunnel FET, High Electron Mobility Transistor (HEMT)
Personal Details
- Male
- Professor , Deen Dayal Upadhyaya College
- https://goo.gl/maps/ZBT3p6VDCwco16h26
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Organisations (5+)
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Co-Authors (9)
Indian Institute of Technology Roorkee
National Institute of Technology Calicut
University of Delhi
K R Mangalam University, Gurgaon
Delhi Technological University
N/A
Guru Gobind Singh Indraprastha University
Birla Institute of Technology and Science
Scholarly Work
Computer Simulation and Mathematical Modeling of Nanoelectronic Devices
Funding Agency: Society for Microelectronics and VLSI, New Delhi
Principal Investigator
1,131,600
2021 - 2024
Qualification of Indium HEMT technology for Space Applications
Funding Agency: Institute of Eminence, University of Delhi
Co-Principal Investigator
300,000
2021 - 2022
Device Simulation for Radiation Analysis of GaN HEMTs for High Power Applications
Funding Agency: Institute of Eminence, University of Delhi
Co-Principal Investigator
500,000
2020 - 2021
Device Simulation for Thermal Management of High Power GaN HEMT
Funding Agency: Defense Research Development Organization (DRDO)
Co-Principal Investigator
2,716,360
2019 - 2021
Layout Optimization and Thermal analysis switching applications and LNA Design
Funding Agency: Defense Research Development Organization (DRDO)
Co-Principal Investigator
27,00,000
2019 - 2021
DBT Star College Scheme
Funding Agency: Department of Biotechnology (DBT)
Principal Investigator
Rs. 84,92,850/-
2018 - 2021
Modelling and Simulation Gate Electrode Engineered and Dielectric Pocket Steep Threshold swing Device for Low Power Digital Circuit Design and Optical Applications
Funding Agency: Council of Scientific and Industrial Research (CSIR)
Co-Principal Investigator
23,00,000
2017 - 2020
Mathematical Modeling and Simulation of Circular and Non-Circular Gate Geometry Junctionless Nanoscale Transistor and co-integration with Memristor Based Electronic Circuits
Funding Agency: University of Delhi
Principal Investigator
4,00,000
2015 - 2017
Physics Based Modeling and Simulation of Channel Material Engineered Ring FET for Sensing Applications
Funding Agency: University Grants Commission, New Delhi, India
Co-Principal Investigator
17,23,000
2014 - 2017
Analytical Modeling, Simulation and Verification of Emerging Nanoscale MULTIGATE Device Structures and Study of Government’s Initiatives for Growth of Electronics In India
Funding Agency: University of Delhi
Principal Investigator
5,50,000
2013 - 2015
Analytical Modelling and Simulation of Sub-100 nm Advance Tunnel FET architecture for RF/ Microwave and Biosensing Applications
Funding Agency: Department of Science and Technology
Co-Principal Investigator
30,68,000
2012 - 2015
Physics Based Modeling and Simulation of Sub-100 nm recessed channel (RC) and insulated shallow extension (ISE) MOSFET with gate electrode work function engineering structures for high performance applications
Funding Agency: Defense Research Development Organization (DRDO)
Co-Principal Investigator
4,70,000
2010 - 2012
Modeling and simulation of Nanoscale Dual Material Gate Insulated Shallow Extension Silicon on Nothing MOSFET for Low voltage low power applications
Funding Agency: University Grants Commission, New Delhi, India
Co-Principal Investigator
9,22,000
2009 - 2012
Physics Based Modeling Simulation and Electrical Characterization of a Novel Device Architecture: Silicon-On-Nothing MOSFET for Sub-100 nm Device Dimensions
Funding Agency: Defense Research Development Organization (DRDO)
Co-Principal Investigator
31,68,000
2004 - 2007
Modeling and simulation of Nanoscale Dual Material Gate Insulated Shallow Extension Silicon on Nothing MOSFET for Low voltage low power applications
Analytical Modeling and Simulation Study of BioFETs for Label Free Electrical Detection of Biomolecules
Modeling and Simulation of Steep Subthreshold Emerging Research Devices for Energy Efficient Low Power Sensing Applications
Experimental Study of Metal Contacts on AlGaN/GaN HEMTs for Device DC & RF Characteristics Improvement and Their Response Under Gamma Radiation
Modeling and Simulation of Field Plate HEMT
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Scholarly Publications
Numerical model of gate-all-around MOSFET with vacuum gate dielectric for biomolecule detection
Open Access
10.1109/LED.2012.2216247
61
61
Analytical drain current model for damaged gate all around (GAA) MOSFET including quantum and velocity overshoot effects
Open AccessPhysics based analytical model for a pocket doped p-n-p-n tunneling field effect transistor
Open AccessTwo-dimensional analytical drain current model for double-gate MOSFET incorporating dielectric pocket
Open Access
10.1109/TED.2012.2206030
29
33
A dielectric-modulated tunnel-FET-based biosensor for label-free detection: Analytical modeling study and sensitivity analysis
Open Access
10.1109/TED.2012.2208115
215
263