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Dr Madhura R

vidwan id: 167910
Female

Assistant Professor, Department of Electronics and Communication Engineering
Dayananda Sagar College of Engineering, BANGALORE

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 21
Books 0
Proceedings 0

Publications

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Scopus

Citations 5
h-index 2

CrossRef

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Citations 5
h-index 2
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Professional Recognition

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THE INSTITUTION OF ENGINEERS (INDIA)

2024
CORPORATE MEMBERSHIP

VLSI SOCIETY OF INDIA

2024
CORPORATE MEMBERSHIP

Bio

Dr ,Madhura R, Assistant Professor working in Dayananda Sagar college of Engineering from 2013 August ,have keen interest in the field of VLSI Design and Embedded systems and has a teaching experience of 13+ years in the area of VLSI/Embedded Systems. I am currently working in the domain of VLSI testing and verification,AI .

Personal Details

  • Female
  • Assistant Professor , Dayananda Sagar College of Engineering, BANGALORE
  • Department of Electronics and Communication Engineering, Dayananda College of Engineering
Ph.D
Other Institute 2024
M.Tech
Other Institute 2013
Assistant Professor Aug 2013 – Present
Dayananda Sagar College of Engineering, BANGALORE | Department of Electronics and Communication Engineering

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Co-Authors (4)

Jamuna

Dr Jamuna S

Dayananda Sagar College of Engineering, BANGALORE

Bhanushree

Dr Bhanushree K J

Bangalore Institute of Technology, BANGALORE-560 004

Manasa

Dr Manasa R

Dayananda Sagar College of Engineering, BANGALORE

Navya Holla

Prof Navya Holla K

Dayananda Sagar College of Engineering, BANGALORE

Scholarly Work

Comparative design and analysis of efficient Radiation Hardened by Design (RHBD) nanometer Non volatile memory chip

Funding Agency: ARDB

CO-PI

491,146

2024 - Ongoing

Ongoing
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IOT enabled audio player integrated printer

Madhura R
- Application No. : 386573-001 Filed : 18-05-2023
Published : N/A Granted

Scholarly Publications

ATSPEED SCAN TESTING FOR RTL DESIGN IN LOWER TECHNOLOGY NODE

Open Access
article
Authors: Madhura, R., Jamuna, S.

FPGA Based Efficient LFSR Architecture for Verification Using Optimized BIST Technique

Open Access
article
Authors: Madhura.R ,Dr. ShanthiPrasad .M. J

FPGA Implementation of Optimized BISTArchitecture for Testing of Logic Circuits

Open Access
article
Authors: Ramya R ., Madhura R .,

Implementation of Scan Logic and Pattern Generation for RTL Design

Open Access
conference paper
Authors: Madhura, R. , Shantiprasad, M.J.

Implementation of Scan Logic and Pattern Generation for RTL Design

Open Access
Conference Paper
Authors: R. Madhura ., M. J. Shantiprasad .,