Ministry of Education
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Dr Chiranjeevi G N

vidwan id: 162232
Male

Assistant Professor, Department of Electronics and Communication Engineering
PES UNIVERSITY, BANGLORE

Orchid Icon 0000-0002-4936-9074 Google Scholar Icon 57215744177 Google Scholar Icon cnz4640AAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 19
Books 0
Proceedings 0

Publications

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Scopus

Citations 45
h-index 5

CrossRef

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Citations 23
h-index 3
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Professional Recognition

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Community & Membership

2022

IEEE

IEEE Member
2022

IEEE

IEEE Member
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Bio

VLSI AND EMBEDDED SYSTEMS, IMAGE PROCESSING APPLICATIONS.

Personal Details

  • Male
  • Assistant Professor , PES UNIVERSITY, BANGLORE
  • Department of ECE, PES University, EC Campus,Hosur Rd, Konappana Agrahara, 560100
Ph.D
Other Institute 2023
M.Tech
National Institute of Technology Karnataka 2012
Assistant Professor Jul 2012 – Present
PES UNIVERSITY, BANGLORE | Department of Electronics and Communication Engineering
Associate Professor Jul 2023 – Jul 2012
PES UNIVERSITY, BANGLORE

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Co-Authors (2)

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Scholarly Work

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Scholarly Publications

Fast architecture for low level vision and image enhancement for reconfigurable platform

Open Access
Conference Paper
Year: 2021.
Authors: Narasimhamurthy C.G.;Kulkarni S.
DOI 10.1109/ICAECT49130.2021.9392425
3 9

Enhanced MAC controller architecture for 2D processing based on FPGA with configurable resource allocation

Open Access
Article
Year: 2021. Volume: 10 , Issue: 3 , Pages: 212-220 .
Authors: Chiranjeevi G.N.;Kulkarni S.
DOI 10.11591/IJRES.V10.I3.PP212-220
2

Image processing using a reconfigurable platform: Pre-processing block hardware architecture

Open Access
Article
Year: 2021. Volume: 10 , Issue: 3 , Pages: 230-236 .
Authors: Chiranjeevi G.N.;Kulkarni S.
DOI 10.11591/IJRES.V10.I3.PP230-236
2 5

Enhanced MAC controller design for 2D convolution image processing on FPGA

Open Access
Article
International Journal of Engineering Trends and Technology. Year: 2021. Volume: 69 , Issue: 9 , Pages: 51-55 .
Authors: Chiranjeevi G.N.;Kulkarni D.S.
DOI 10.14445/22315381/IJETT-V69I9P207
1 3

Pipeline Architecture for N==K*2L Bit Modular ALU: Case Study between Current Generation Computing and Vedic Computing

Open Access
Conference Paper
Year: 2021.
Authors: Chiranjeevi G.N.;Kulkarni S.
DOI 10.1109/I2CT51068.2021.9417917
6 9

Implementation of VLSI Routing Technique forReal Time Circuits

Open Access
other
Year: 2020.
Authors: Chiranjeevi G N. Rohit Hariharan. Jai Krishna Kumar. Veena Chandroji Rao.

Implementing Image Processing Algorithms using Xilinx System Generator with Real Time Constraints

Open Access
Conference Paper
Year: 2019. Pages: 230-234 .
Authors: Durgakeri B.S.;Chiranjeevi G.N.
DOI 10.1109/RTEICT46194.2019.9016962
2 6

A 18.6 fJ/bit/dB Power Efficient Active Inductor-based CTLE for 20 Gb/s High Speed Serial Link

Open Access
Conference Paper
Year: 2019.
Authors: Thulasiraman D.;Chiranjeevi G.N.;Gaggatur J.S.;Reddy K.S.S.
DOI 10.1109/CONECCT47791.2019.9012917
6 9