Ministry of Education
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Dr BISHNU PRASAD DAS

vidwan id: 155278
Male

Associate Professor, Electronics and Communication Engineering
Indian Institute of Technology Roorkee

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 39
Books 0
Proceedings 0

Publications

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Scopus

Citations 223
h-index 8

CrossRef

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Citations 110
h-index 6
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Professional Recognition

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Bio

VLSI Circuit and System Level Designs, Cyber Physical System Designs and FPGA based Designs., Standard Cell library Design, Resilient circuit design, Hardware security, Variability Measurement

Personal Details

  • Male
  • Associate Professor , Indian Institute of Technology Roorkee
  • Department of Elctronics and Communication Engineering
Ph.D
Other Institute 2009
Associate Professor Apr 2014 – Present
Indian Institute of Technology Roorkee | Electronics and Communication Engineering

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Co-Authors (4)

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Scholarly Work

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Scholarly Publications

Frequency-independent warning detection sequential for dynamic voltage and frequency scaling in ASICs

Open Access
Article
Year: 2014. Volume: 22 , Issue: 12 , Pages: 2535-2548 .
Authors: Das B.P.;Onodera H.
DOI 10.1109/TVLSI.2013.2296033
10 13

Voltage and temperature-aware SSTA using neural network delay model

Open Access
Article
IEEE Transactions on Semiconductor Manufacturing. Year: 2011. Volume: 24 , Issue: 4 , Pages: 533-544 .
Authors: Das B.P.;Amrutur B.;Jamadagni H.S.;Arvind N.V.;Visvanathan V.
DOI 10.1109/TSM.2011.2163532
12 12

Warning prediction sequential for transient error prevention

Open Access
Conference Paper
Year: 2010. Pages: 382-390 .
Authors: Das B.;Onodera H.
DOI 10.1109/DFT.2010.52
10 14

Within-Die gate delay variability measurement using reconfigurable ring oscillator

Open Access
Article
IEEE Transactions on Semiconductor Manufacturing. Year: 2009. Volume: 22 , Issue: 2 , Pages: 256-267 .
Authors: Das B.P.;Amrutur B.;Jamadagni H.S.;Arvind N.V.;Visvanathan V.
DOI 10.1109/TSM.2009.2017662
35 36

Voltage and temperature scalable gate delay and slew models including intra-gate variations

Open Access
Conference Paper
Year: 2008. Pages: 685-690 .
Authors: Das B.;Janakiraman V.;Amrutur B.;Jamadagni H.;Arvind N.
DOI 10.1109/VLSI.2008.92
6 7

Voltage and temperature scalable standard cell leakage models based on stacks for statistical leakage characterization

Open Access
Conference Paper
Year: 2008. Pages: 667-672 .
Authors: Viraraghavan J.;Das B.P.;Amrutur B.
DOI 10.1109/VLSI.2008.38
6 10

Within-die gate delay variability measurement using re-configurable ring oscillator

Open Access
Conference Paper
Year: 2008. Pages: 133-136 .
Authors: Das B.P.;Amrutur B.;Jamadagni H.S.;Arvind N.V.;Visvanathan V.
DOI 10.1109/CICC.2008.4672039
3 24