Ministry of Education
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Mr Rajan Prasad Tripathi

vidwan id: 133852
Male

Lecturer, Amity School of Engineering and Technology (Noida)
Amity University, Uttar Pradesh

Orchid Icon 0000-0002-1192-4773 Google Scholar Icon 57202043224

Expertise

  • Computer Science Information Systems

Publications

Total Articles 23
Books 0
Proceedings 0

Publications

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Scopus

Citations 114
h-index 7

CrossRef

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Citations 6
h-index 1
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Bio

Data Science, Machine Learning, Deep Learning

Personal Details

  • Male
  • Lecturer , Amity University, Uttar Pradesh
  • Amity Road, Sector 125
M.Tech
Amity University, Uttar Pradesh 2013
Lecturer Jul 2014 – Present
Amity University, Uttar Pradesh | Amity School of Engineering and Technology (Noida)

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Co-Authors (4)

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Scholarly Work

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Scholarly Publications

Simulation and Analysis of Single Layer Silicon 2D P-i-N Solar Cell Using Comsol

Open Access
Conference Paper
Year: 2019.
Authors: Tripathi R.P.;Aggarwal T.;Das A.;Verma R.K.
DOI 10.1109/IoT-SIU.2019.8777702
2

Analysis of Slotsin Patch Antenna for wide Band

Open Access
Conference Paper
Year: 2019.
Authors: Aggarwal T.;Jain P.;Kumarverma R.;Tripathi R.
DOI 10.1109/IoT-SIU.2019.8777491
1

Parameter estimation of software reliability growth models using hybrid genetic algorithm

Open Access
Conference Paper
Year: 2017. Volume: 2018-January , Pages: 317-322 .
Authors: Kumar A.;Tripathi R.P.;Saraswat P.;Gupta P.
DOI 10.1109/ICIIP.2017.8313732
2 7

Estimating the functionality of object oriented system using MCDM approach

Open Access
Conference Paper
Year: 2017. Volume: 2018-January , Pages: 50-55 .
Authors: Yadav N.;Saraswat P.;Tripathi R.P.
DOI 10.1109/ICIIP.2017.8313683
2

Finger print recognition using biometrie analysis and munutia features

Open Access
Conference Paper
Year: 2017. Volume: 2018-January , Pages: 336-339 .
Authors: Tripathi R.P.;Goyal R.
DOI 10.1109/ICIIP.2017.8313736
1

Design & analysis of 16 bit RISC processor using low power pipelining

Open Access
Conference Paper
Year: 2015. Pages: 1294-1297 .
Authors: Trivedi P.;Tripathi R.P.
DOI 10.1109/CCAA.2015.7148575
14

High speed 16-bit digital vedic multiplier using FPGA

Open Access
Conference Paper
Year: 2015. Pages: 121-124 .
Authors: Narula U.;Tripathi R.;Wakhle G.
2