Ministry of Education
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Dr Rajshekar K

vidwan id: 128022
Male

Assistant Professor (Grade-I), Department of Computer Science and Engineering
Indian Institute of Technology Dharwad

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Expertise

  • Computer Science Artificial Intelligence

Publications

Total Articles 18
Books 0
Proceedings 0

Publications

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Scopus

Citations 119
h-index 5

CrossRef

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Citations 84
h-index 5
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Community & Membership

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Bio

Computer Architecture, Hardware Reliability, Hardware Security, Accountability issues in Heterogeneous 3PIP Containing SOCs, Microarchitectural Simulation

Personal Details

  • Male
  • Assistant Professor (Grade-I) , Indian Institute of Technology Dharwad
  • Indian Instutite of Technology Dharwad
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Assistant Professor (Grade-I) Jan 2018 – Present
Indian Institute of Technology Dharwad | Department of Computer Science and Engineering

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Co-Authors (6)

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Prof Amitabha Bagchi

Indian Institute of Technology Delhi

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Prof Preeti Ranjan Panda

Indian Institute of Technology Delhi

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Dr Piyush P Kurur

Indian Institute of Technology, Palakkad

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Dr Ramchandra Phawade

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Scholarly Work

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Scholarly Publications

ChunkedTejas: A Chunking-based Approach to Parallelizing a Trace-Driven Architectural Simulator

Open Access
Article
ACM Transactions on Modeling and Computer Simulation. Year: 2020. Volume: 30 , Issue: 3 .
Authors: Kalayappan R.;Chhabra A.;Sarangi S.R.
DOI 10.1145/3375397
1 2

Providing accountability in heterogeneous systems-on-chip

Open Access
Article
ACM Transactions on Embedded Computing Systems. Year: 2018. Volume: 17 , Issue: 5 .
Authors: Kalayappan R.;Sarangi S.
DOI 10.1145/3241048
2 2

ParTejas: A parallel simulator for multicore processors

Open Access
Article
ACM Transactions on Modeling and Computer Simulation. Year: 2017. Volume: 27 , Issue: 3 .
Authors: Malhotra G.;Kalayappan R.;Goel S.;Aggarwal P.;Sagar A.;Sarangi S.R.
DOI 10.1145/3077582
5

A hardware implementation of the MCAS synchronization primitive

Open Access
Conference Paper
Year: 2017. Pages: 918-921 .
Authors: Patel S.;Kalayappan R.;Mahajan I.;Sarangi S.
DOI 10.23919/DATE.2017.7927120
5 9

SecCheck: A trustworthy system with untrusted components

Open Access
Conference Paper
Year: 2016. Volume: 2016-September , Pages: 379-384 .
Authors: Kalayappan R.;Sarangi S.
DOI 10.1109/ISVLSI.2016.31
5 6

A survey of checker architectures

Open Access
Article
ACM Computing Surveys. Year: 2015. Volume: 45 , Issue: 4 .
Authors: Kalayappan R.;Sarangi S.R.
DOI 10.1145/2501654.2501662
12 14

SecX: A framework for collecting runtime statistics for SoCs with multiple accelerators

Open Access
Conference Paper
Year: 2015. Volume: 07-10-July-2015 , Pages: 137-142 .
Authors: Kalayappan R.;Sarangi S.R.
DOI 10.1109/ISVLSI.2015.22
3 3

FluidCheck: A redundant threading-based approach for reliable execution in manycore processors

Open Access
Article
ACM Transactions on Architecture and Code Optimization. Year: 2015. Volume: 12 , Issue: 4 .
Authors: Kalayappan R.;Sarangi S.
DOI 10.1145/2842620
2 3