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Dr Laxmisagar HS

vidwan id: 115981
Male

Assistant Professor, Department of Electronics and Communication Engineering
BMS Institute of Technology and Management

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 9
Books 0
Proceedings 0

Publications

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Scopus

Citations 10
h-index 2

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Citations 1
h-index 1
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Bio

VLSI

Personal Details

  • Male
  • Assistant Professor , BMS Institute of Technology and Management
  • BMS Institute of Technology and Management, Doddaballapur Main Road, Avalahalli
Ph.D
BMS Institute of Technology and Management 2023
M.Tech
Other Institute 2010
Assistant Professor Jul 2011 – Present
BMS Institute of Technology and Management | Department of Electronics and Communication Engineering

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Co-Authors (3)

Jagannatha

Dr Jagannatha Kb

BMS Institute of Technology and Management

M. C.

Dr M. C. Hanumantharaju

BMS Institute of Technology and Management

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Dr Saneesh Cleatus T

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Scholarly Work

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Scholarly Publications

FPGA implementation of breast cancer detection using SVM linear classifier

Open Access
article

Design of an Efficient Deep Neural Network for Multi-level Classification of Breast Cancer Histology Images

Open Access
Conference Paper

A Survey on Automated Detection of Breast Cancer based Histopathology Images

Open Access
Conference Paper
Authors: Laxmisagar H.S.;Hanumantharaju M.C.

Design and Verification of APB Compliant Quad Channel UART with arbitrary random skew

Open Access
other
Authors: Laxmisagar H.S, Vinutha B

FPGA and ASIC implementation of 16-Bit vedic multiplier using Urdhva Triyakbhyam sutra

Open Access
Conference Paper
Authors: Jagannatha K.;Lakshmisagar H.;Bhaskar G.

An Eye Tracking Scheme Employing Viola-Jones and Template Matching Algorithm

Open Access
article
Authors: Lakshmi Sagar H.S, Saneesh Cleatus T, Roshini Seshadri, S Kala Rubini, Sahana Sathyanarayana

FPGA implementation of reversible floating point multiplier using CSA

Open Access
other
Authors: Vidya Devi M, Lakshmisagar H S, Pankaj Kumar Singh, Nitesh Kumar, Pitamber kumar

FPGA and ASIC implementation of 16-bit Vedic multiplier

Open Access
conference proceedings
Authors: Jagannatha, K. B., Lakshmisagar, H. S., Arunkumar D